From 5ef16da1000155161b68b20144ae7eee29ca5f19 Mon Sep 17 00:00:00 2001 From: Lorenzo Good Date: Mon, 1 Jun 2026 18:19:56 -0400 Subject: [PATCH] Flashing & Blinky --- .cargo/config.toml | 3 +++ Cargo.toml | 8 ++++++++ debug/flash_procs.tcl | 12 ++++++++++++ debug/openocd.cfg | 6 ++++++ debug/openocd.gdb | 3 +++ memory.x | 4 ++-- src/main.rs | 8 ++++++-- 7 files changed, 40 insertions(+), 4 deletions(-) create mode 100644 debug/flash_procs.tcl create mode 100644 debug/openocd.cfg create mode 100644 debug/openocd.gdb diff --git a/.cargo/config.toml b/.cargo/config.toml index 45acf6e..4b7f228 100644 --- a/.cargo/config.toml +++ b/.cargo/config.toml @@ -3,3 +3,6 @@ target = "thumbv7m-none-eabi" rustflags = [ "-C", "link-arg=-Tlink.x", ] + +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +runner = "arm-none-eabi-gdb -q -x debug/openocd.gdb" diff --git a/Cargo.toml b/Cargo.toml index 4edcdd8..2ac548e 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -9,4 +9,12 @@ cortex-m-rt = "0.7.5" panic-halt = "1.0.0" stm32l4xx-hal = { version = "0.7.1", features = ["rt", "stm32l433"] } +[profile.dev] +opt-level = 1 # we don't fit at 0, and check is nice +[profile.release] +codegen-units = 1 +debug = true +lto = true +opt-level = "z" +overflow-checks = true \ No newline at end of file diff --git a/debug/flash_procs.tcl b/debug/flash_procs.tcl new file mode 100644 index 0000000..b64f7f7 --- /dev/null +++ b/debug/flash_procs.tcl @@ -0,0 +1,12 @@ +init + +proc flash_stm32 {FILE} { + reset halt + sleep 100 + wait_halt 2 + + flash write_image erase $FILE + verify_image $FILE + + reset run +} diff --git a/debug/openocd.cfg b/debug/openocd.cfg new file mode 100644 index 0000000..073ef52 --- /dev/null +++ b/debug/openocd.cfg @@ -0,0 +1,6 @@ +source [find interface/cmsis-dap.cfg] +source [find target/stm32l4x.cfg] + +source "flash_procs.tcl" + +adapter speed 200 \ No newline at end of file diff --git a/debug/openocd.gdb b/debug/openocd.gdb new file mode 100644 index 0000000..70f0ee9 --- /dev/null +++ b/debug/openocd.gdb @@ -0,0 +1,3 @@ +target extended-remote localhost:3333 +load +tui layout src \ No newline at end of file diff --git a/memory.x b/memory.x index fdf940d..e6300eb 100644 --- a/memory.x +++ b/memory.x @@ -2,8 +2,8 @@ MEMORY { /* NOTE K = KiBi = 1024 bytes */ /* TODO Adjust these memory regions to match your device memory layout */ - FLASH : ORIGIN = 0x8000000, LENGTH = 128K - RAM : ORIGIN = 0x20000000, LENGTH = 32K + FLASH : ORIGIN = 0x8000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 64K } /* This is where the call stack will be allocated. */ diff --git a/src/main.rs b/src/main.rs index b64dd4a..8bd372b 100644 --- a/src/main.rs +++ b/src/main.rs @@ -6,7 +6,10 @@ use panic_halt; use cortex_m_rt::entry; -use stm32l4xx_hal::{prelude::*, flash::FlashExt, gpio::GpioExt, pac, pwr::PwrExt, rcc::RccExt, time::Hertz, delay::Delay}; +use stm32l4xx_hal::{ + delay::Delay, flash::FlashExt, gpio::GpioExt, pac, prelude::*, pwr::PwrExt, rcc::RccExt, + time::Hertz, +}; #[entry] fn main() -> ! { @@ -20,7 +23,8 @@ fn main() -> ! { // Ok for now, but ideally actually think about what this does (especially when we have tim). let clocks = rcc .cfgr - .hclk(Hertz::MHz(8)) + .sysclk(Hertz::MHz(64)) + .pclk1(Hertz::MHz(32)) .freeze(&mut flash.acr, &mut pwr); let mut gpioa = dp.GPIOA.split(&mut rcc.ahb2);